Why does dewfpga exist, and is it enough for CS223?

Vivado has no macOS build. The open-source chain that replaces it exists, but nobody had written down how to stand it up on an Apple Silicon Mac in one place.

Is it enough for CS223?

Real lab code from old student repos went through: an FSM with typedef enum, a 16x8 RAM, a debouncer with a carry chain, and the course's seven-segment module. All four together synthesize to 136 LUTs and 48 flip-flops, timing passes at 154.70 MHz against the 100 MHz clock, and the bitstream is ready in 4.5 seconds. parameter, generate, struct packed, $clog2, unique case, packed arrays and interface with modport all synthesized with zero errors.

Nothing from Vivado's IP Catalog is available. 35 old CS223 student repos with 240 source files were checked for it; none of them use any of it. The course has you write clock dividers and memory by hand, which this chain builds; one difference: with no create_clock in the XDC, the logic on a divided clock is checked at 100 MHz, which Vivado does not do. The other limit is the language: some SystemVerilog that Vivado compiles is refused here, and some builds a wrong bitstream with no error. The constructs measured so far, each next to what Vivado does and the source for it (its user guide, a Vivado log, the language standard, or a forum post, marked as a weak source), are in test/sv/expect.tsv. The rest is in the guide: what it cannot do.

What does it cost, compared with Vivado?

The Vivado disk figure is AMD's own requirement; nothing else about Vivado was measured here.

What were the six walls?

CS223 is Bilkent's digital design course: write SystemVerilog, simulate, synthesize, load it onto a Basys3. The five open-source tools that cover that loop all run on macOS; getting them to work together took six hours, and the time went into these.

1. oss-cad-suite does not ship nextpnr-xilinx. It is YosysHQ's ready-made bundle with a macOS build, and it looks like the obvious first try. It has nextpnr for ice40, ecp5, nexus and Gowin chips. 497 MB downloaded to learn that Xilinx is missing. nextpnr-xilinx has to be built from source.
2. Homebrew's Python refuses pip install. PEP 668 marks it as externally managed. Two steps of the chain are Python scripts with a few packages, so a venv is required.
3. Apple's clang has no OpenMP. nextpnr's default build dies on the first file with unsupported option '-fopenmp'. It needs -DUSE_OPENMP=OFF, which only slows one part of placement, and at lab sizes you do not notice.
4. There is no prebuilt chip database. nextpnr knows how to place and route but nothing about the XC7A35T. The database is generated per device with bbaexport.py and bbasm: a 256 MB text file, packed into an 89 MB binary.
5. prjxray hides its dependencies in submodules. Without --recursive CMake fails on yaml-cpp, then on googletest, then on abseil, one at a time. Nothing gives you the list up front.
6. CMake 4 rejects prjxray. The project is written for an older CMake and the current one refuses to configure it without -DCMAKE_POLICY_VERSION_MINIMUM=3.5.

What is dewfpga?

The guide: the six walls removed, in steps that a first-year student can paste. The command-line tool installs the chain in one line and builds any folder of .sv files without a Makefile. The Basys3 simulator and the testbench runner run in the browser. Next, a compiler in the browser.