errors · bitdewfpga bit / flash, before synthesis
ERROR [no-xdc-file]: no .xdc pin file in this folder, and these ports of adder have no board name: a b y. Ports named like the board's (clk sw led btnC btnU btnD btnL btnR seg dp an) need no .xdc. Fix: rename those ports, or copy ~/.dewfpga/templates/Basys3_Master.xdc here and uncomment the pins you use.
dewfpga sim works without it; dewfpga bit stops here, before synthesis. The line names the ports without a board name and prints the full path of the template.
ERROR [no-xdc-file]: no .xdc pin file in this folder, and these ports of adder have no board name: a b y. Ports named like the board's (clk sw led btnC btnU btnD btnL btnR seg dp an) need no .xdc. Fix: rename those ports, or copy /Users/you/.dewfpga/templates/Basys3_Master.xdc here and uncomment the pins you use. https://nosey-dewdrop.github.io/dewfpga/errors/no-xdc-file/Why does it happen?
A port called sw, led, btnC, clk, seg, dp or an has its pin on the board's own label, and the CLI writes those pins itself (pins: automatic Basys3 mapping), as Run does. A port called a or y could be any switch or LED: that choice is the student's, and it lives in an .xdc. A lab folder copied without its XDC has the design and nothing that binds y to pin U16.
What is the fix?
Name the ports like the board's (input logic [1:0] sw, output logic [0:0] led), or copy the course's master file next to the design and remove the # in front of the pins the design uses; the CLI takes <top>.xdc, or the only .xdc in the folder:
cp ~/.dewfpga/templates/Basys3_Master.xdc . && dewfpga bit