errors · bitdewfpga sim / bit, the source scan before the tools run
ERROR [no-design-module]: no design module in blink_tb.sv (only testbenches). Fix: a design is a module with ports; put it in a .sv file in this folder, or start one: dewfpga new blink
ERROR [no-design-module]: no design module in blink_tb.sv (only testbenches). Fix: a design is a module with ports; put it in a .sv file in this folder, or start one: dewfpga new blink https://nosey-dewdrop.github.io/dewfpga/errors/no-design-module/Why does it happen?
The design's file is missing from the folder (copied the testbench only), or the design was written without ports.
What is the fix?
Put the design's .sv next to the testbench, or give the module its ports (module blink(input logic clk, output logic [15:0] led);).
ls *.sv